This invention relates to a device for the electronic control of gain or attenuation of an electronic signal. Such devices are commonly known as voltage controlled amplifiers (VCA), electronic gain controls (EGC), or electronic multipliers.
The function of such a device is to provide a signal input to which a signal current or voltage is applied, a control input to which a control voltage or current is supplied, and a signal current or voltage output. In operation, the magnitude of the signal output is governed by the magnitude of the input signal together with the magnitude and polarity of the control signal.
Such devices find application in audio automation systems, audio signal processing devices such as limiters, compressors and expanders, as well as in a wide variety of industrial systems wherein the gain or loss of one signal requires control by another signal.
It is common that electronic multipliers function on a "linear multiplication basis," wherein a given percentage of change in control signal will result in an equal percentage of change in the signal gain, thus allowing direct mathematic calculations. However, in many applications such as audio work, it is desirable to employ a logarithmic relationship between the control and signal inputs. In such a relationship, a given increment of control change will cause a given percentage of signal gain change. For instance, such a scaling might be employed so that a one-volt change in control voltage causes a 20 decibel (100%) change in signal gain or loss. It is also common, in such logarithmically responding devices, to provide for a nominal signal gain of unity, with zero control voltage or current applied, and to provide signal amplification for one polarity of control while providing signal attenuation for the opposite polarity of applied control voltage or current.
Particularly for applications in the control of professional audio signal, the performance of EGC devices is governed by very stringent requirements, in terms of noise levels, distortion production, gain control range, gain control linearity and rejection of control signals at the signal output.
Many designs have been advanced for the purposes outlined here, ranging from photocell and FET transistor control, digital methods, and methods involving use of the inherent logarithmic multiplication capabilities of the bipolar transistor junctions. The latter methods have generally proven most satisfactory and are in the widest use.
The properties of the bipolar transistor are known and well documented as well as being very predictable. Of particular concern to the art of electronic multiplication and gain control, is the relationship between the voltage of the base/emitter junction versus the collector current. This relationship follows an exacting log law, wherein at room temperture, a 60 milivolt change in base/emitter voltage will result in, or be caused by, a 20 dB, or one decade, change in collector current. This result is thermally modified at the rate of +0.3%/degree C., and such thermal scaling is entirely predictable. Transistors suitable for these uses are typified as exhibiting base/emitter voltages in the order of 600 millivolts, at room temperture, with collector currents in the order of 1 milliampere.
In addition to the aforementioned scale factor of 60 mv/decade +0.3%/degree C., there is a second thermally sensitive base/emitter voltage term known as "bulk offset voltage," which varies at the rate of about 2.2 millivolts per degree C. While the 60 mv/decade scale factor term is precise and constant between transistors of one manufactured type, the bulk offset term is subject to variations from unit to unit. As an example, given a number of transistors from a manufactured batch, the measured base/emitter voltages may vary over perhaps a 30 millivolt range. It is not a difficult process to "match" transistors into pairs or quads, which all exhibit base/emitter voltages within less than one millivolt of one another. When two or more units are so matched, they are capable of excellent log/antilog tracking, and form the basis for multiplier circuits using this art.
One inherent problem exists, however, in that the bipolar transistor is capable of passing current only in one direction (unipolar flow), while many signals to be processed are of a bipolar nature, or require current flow in two directions or polarities. Thus, some method must be devised to allow the processing of a bipolar signal in an inherently unipolar medium. This may be done by biasing the signal so as to limit its domain to one polarity domain as in the U.S. Embley U.S. Pat. No. 3,532,868, or by directing each half or polarity of the input signal to one of a pair of transistor paths, as in the Blackmer U.S. Pat. No. 3,714,462, or the Buff U.S. Pat. No. 4,225,794, issued Sept. 30, 1980.
Still another problem encountered, when very low distortion performance is required, is the presence of a pure resistance, resulting from the base/emitter physical connection, which appears to be in series with the generated log/antilog function of the transistor element. This resistance, at the higher operating currents, causes a deviation from a true log/antilog transfer function which, if not compensated for, leads to signal waveform distortion.
The Blackmer U.S. Pat. No. 3,714,462 teaches a configuration wherein a pair of transistors of opposite polarity are connected in feedback configuration around an operational amplifier to form a split-path, bipolar, log-function generator. Means for summing a control voltage are provided so that the sum of the log of the input signal and the control signal is presented to a split-path antilog function generator consisting of a pair of transistors of opposite polarity feeding a current to a voltage-converting operational amplifier stage. A slight bias is applied to the logging transistors so that, as the input signal crosses zero volts, both logging transistors are in slight conduction. This bias eliminates the "dead zone" which might result as the input signal crosses the domain of one transistor to the domain of the other.
The Blackmer circuit provides the desired logarithmic relationship between control voltage and signal gain/loss, and exhibits unity signal gain at zero control volts. The circuit is capable of either gain or loss, depending on the polarity of the applied control voltage.
Since, in the Blackmer circuit, the quiescent bias current is much smaller than the typical signal current, the circuit is classified as Class AB. This structure has the advantage of producing low quiescent noise levels due to the low current, under no signal conditions. However, as signals are introduced, the noise level dramatically increases in proporation to the magnitude of the applied signal. This phenomenon is known as "modulation noise," and can be objectionable to professional users. A Class A structure, wherein the bias current is greater than the signal level, would effectively eliminate modulation noise, but would result in a generally higher overall noise level than the Class AB approach. The Embley U.S. Pat. No. 3,532,868 shows a Class A circuit.
A further problem associated with both the Blackmer and Embley circuits is the resistive component of the transistor base/emitter junction. As described earlier, this component leads to the production of an objectionable amount of signal distortion. Particularly in the Blackmer circuit, the distortion production is an odd-order harmonic due to the balanced nature of the circuit. It is generally accepted in audio work that odd-order harmonic distortion is perceived as being more objectionable than even-order harmonic distortion. In both the Blackmer and Embley circuits, a substantial amount of intermodulation distortion is produced by the non-linearities.
A further problem with the Blackmer circuit is the fact that one polarity of the signal waveform is processed by NPN transistors, while the other polarity is processed by PNP transistors. The two types of transistors, being of different manufacturing processes, necessarily have subtle differences in scale factor, temperature coefficients and related parameters. Consequently, more distortions are introduced due to unequal processing of the two waveform halves. Additionally, certain amounts of "crossover distortion" are introduced in the Blackmer circuit as the signal passes in conduction from one transistor to the other at, or near, zero crossings.
Still another problem with the Blackmer circuit stems again from the Class AB structure. Since each half of the signal waveform is processed in separate transistors, unequal heating of the log/antilog transistors can cause the amplitude of one signal half to vary with respect to the other half. This situation leads to the production of thermally induced, even-order distortion. Although Blackmer specifies the use of a "common heat sink," the extreme nature of the inherent thermal sensitivities involved do not allow for a substantial control of thermally induced distortion, even with a common heat sink, in a Class AB design. This sort of problem is inherently non-existent in a Class A design such as the Embley circuit, since both waveform halves of the A.C. signal are processed by the same transistor elements.